Field of the Invention
This invention relates to an active matrix-type liquid crystal display device and a method of making the same. More particularly, it relates to a novel structure of wiring, such as signal lines and scanning lines, and pixel electrodes formed on an array substrate and a manufacturing process for it.
An active matrix-type liquid crystal display device is provided with an array substrate, a counter substrate disposed opposite to the array substrate, alignment layers formed on the array and counter substrates, respectively, and a liquid crystal composition held between the substrates through the alignment layers. The array substrate includes an isolation substrate, such as a glass substrate, a plurality of signal and scanning lines made of low electric resistance materials, such as aluminum, in matrices, thin film transistors (TFTs) provided at cross points of the signal and scanning lines, respectively, and indium tin oxide (ITO) pixel electrodes connected to the TFTs. An isolation layer is interposed between the scanning lines and the pixel electrodes to define storage capacitors. The surface of the array substrate is covered with the alignment layer to align the liquid crystal composition.
The active matrix-type liquid crystal device of this sort is generally manufactured in the following processes. In the first step a predetermined composition layer, e.g., an ITO layer is formed on a glass substrate by sputtering or chemical vapor deposition (CVD). In the second step a photoresist is coated on the ITO layer. The photoresist is optically exposed through a photomask with a predetermined pattern in the third step. The photoresist is selectively removed from the ITO layer by developing in order to transfer the pattern thereto in the fourth step. The layers under the photoresist are subject to etching, e.g., wet or dry etching through the remaining photoresist. As a result, the mask pattern is formed on the layers in the fifth step. Finally, the remaining photoresist already used as a mask is removed from the ITO layer so that the pattern defining steps are completed.
A plurality of composition layers with a predetermined pattern are formed on an array substrate through repeating such layer forming processes a prescribed numbers of times. In the processes for manufacturing an array substrate set forth above, a plurality of masks are necessarily used for separate exposure steps to make a predetermined pattern on a same layer. In other words, since one sheet of photomask cannot cover a liquid crystal display device pattern in the case of a larger array substrate in accordance with a larger display area of a liquid crystal display device, a display area is divided into a plurality of optical exposure regions and optical exposure is performed for each of the optical exposure regions in patterning each layer.
When an optical exposure is performed for patterning a plurality of exposure regions divided in a display area, one after the other, on an array substrate as described above, the patterning accuracy depends largely on positioning errors of the optical exposure device used for the patterning processes. In short, after a first wiring pattern made of a first layer has been formed on an array substrate as a reference pattern, a second wiring pattern made of a second layer is formed. The second pattern may have relative positioning deviations with respect to the reference pattern in each of the divided exposure regions due to the positioning error of the exposure device.
When pixel electrodes made of an ITO layer as reference patterns are combined with the second wiring (signal line) pattern of an aluminum material, the exposure regions differ in distances defined between the pixel electrodes and the signal lines.
The wiring patterns formed in different process steps may cause relative positioning deviations in each of the exposure regions. Since electric force lines are distributed between the first and adjacent second wiring patterns formed on the isolation layer, a parasitic capacitance is defined between them in response to the density of electric force lines. In the above case, a parasitic capacitance is defined between the signal line and the pixel electrode.
Where the distance between the pixel electrode and the signal line is different from one of the exposure regions to another, they differ in the density of electric force lines and the capacitance defined between them from each other. As a result, effective voltages applied to the liquid crystal layer differ in each exposure region so that the brightness of the exposure regions is different from each other and boundaries between the regions appear on the display area. This leads to a problem of a poor quality display which is referred to as the unevenness of combined images.